mirror of https://github.com/OpenTTD/OpenTTD
Codechange: Use (Diag)Directions when drawing catenary.
parent
87544eff0c
commit
1ac9f24f38
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@ -83,7 +83,7 @@ static inline TLG GetTLG(TileIndex t)
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* @param override pointer to PCP override, can be nullptr
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* @return trackbits of tile if it is electrified
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*/
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static TrackBits GetRailTrackBitsUniversal(TileIndex t, uint8_t *override)
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static TrackBits GetRailTrackBitsUniversal(TileIndex t, DiagDirections *override)
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{
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switch (GetTileType(t)) {
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case MP_RAILWAY:
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@ -100,7 +100,7 @@ static TrackBits GetRailTrackBitsUniversal(TileIndex t, uint8_t *override)
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if (GetTunnelBridgeTransportType(t) != TRANSPORT_RAIL) return TRACK_BIT_NONE;
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if (!HasRailCatenary(GetRailType(t))) return TRACK_BIT_NONE;
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if (override != nullptr && (IsTunnel(t) || GetTunnelBridgeLength(t, GetOtherBridgeEnd(t)) > 0)) {
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*override = 1 << GetTunnelBridgeDirection(t);
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*override = GetTunnelBridgeDirection(t);
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}
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return DiagDirToDiagTrackBits(GetTunnelBridgeDirection(t));
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@ -295,10 +295,10 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
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}
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TLG tlg = GetTLG(ti->tile);
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uint8_t pcp_status = 0;
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uint8_t override_pcp = 0;
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uint8_t ppp_preferred[DIAGDIR_END];
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uint8_t ppp_allowed[DIAGDIR_END];
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DiagDirections pcp_status{};
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DiagDirections override_pcp{};
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std::array<Directions, DIAGDIR_END> ppp_preferred{};
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std::array<Directions, DIAGDIR_END> ppp_allowed{};
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/* Find which rail bits are present, and select the override points.
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* We don't draw a pylon:
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@ -343,7 +343,7 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
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isflat[TS_NEIGHBOUR] = ((trackconfig[TS_NEIGHBOUR] & (TRACK_BIT_HORZ | TRACK_BIT_VERT)) != 0);
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ppp_preferred[i] = 0xFF; // We start with preferring everything (end-of-line in any direction)
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ppp_preferred[i] = DIRECTIONS_ALL; // We start with preferring everything (end-of-line in any direction)
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ppp_allowed[i] = AllowedPPPonPCP[i];
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/* We cycle through all the existing tracks at a PCP and see what
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@ -363,19 +363,19 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
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/* track found, if track is in the neighbour tile, adjust the number
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* of the PCP for preferred/allowed determination*/
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pcp_pos = (TrackSourceTile[i][k] == TS_HOME) ? i : ReverseDiagDir(i);
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SetBit(pcp_status, i); // This PCP is in use
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pcp_status.Set(i); // This PCP is in use
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ppp_preferred[i] &= PreferredPPPofTrackAtPCP[TracksAtPCP[i][k]][pcp_pos];
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}
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if (HasBit(trackconfig[TrackSourceTile[i][k]], TracksAtPCP[i][k])) {
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ppp_allowed[i] &= ~DisallowedPPPofTrackAtPCP[TracksAtPCP[i][k]][pcp_pos];
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ppp_allowed[i].Reset(DisallowedPPPofTrackAtPCP[TracksAtPCP[i][k]][pcp_pos]);
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}
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}
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/* Deactivate all PPPs if PCP is not used */
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if (!HasBit(pcp_status, i)) {
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ppp_preferred[i] = 0;
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ppp_allowed[i] = 0;
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if (!pcp_status.Test(i)) {
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ppp_preferred[i].Reset();
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ppp_allowed[i].Reset();
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}
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Foundation foundation = FOUNDATION_NONE;
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@ -402,7 +402,7 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
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* Level means that the slope is the same, or the track is flat */
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if (tileh[TS_HOME] == tileh[TS_NEIGHBOUR] || (isflat[TS_HOME] && isflat[TS_NEIGHBOUR])) {
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for (uint k = 0; k < NUM_IGNORE_GROUPS; k++) {
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if (ppp_preferred[i] == IgnoredPCP[k][tlg][i]) ClrBit(pcp_status, i);
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if (ppp_preferred[i] == IgnoredPCP[k][tlg][i]) pcp_status.Reset(i);
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}
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}
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@ -410,7 +410,7 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
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* In that case, we try the any of the allowed ones. if they don't exist either, don't draw
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* anything. Note that the preferred PPPs still contain the end-of-line markers.
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* Remove those (simply by ANDing with allowed, since these markers are never allowed) */
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if ((ppp_allowed[i] & ppp_preferred[i]) != 0) ppp_allowed[i] &= ppp_preferred[i];
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if (ppp_allowed[i].Any(ppp_preferred[i])) ppp_allowed[i] &= ppp_preferred[i];
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if (IsBridgeAbove(ti->tile)) {
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Track bridgetrack = GetBridgeAxis(ti->tile) == AXIS_X ? TRACK_X : TRACK_Y;
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@ -418,21 +418,23 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
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if ((height <= GetTileMaxZ(ti->tile) + 1) &&
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(i == PCPpositions[bridgetrack][0] || i == PCPpositions[bridgetrack][1])) {
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SetBit(override_pcp, i);
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override_pcp.Set(i);
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}
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}
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if (ppp_allowed[i] != 0 && HasBit(pcp_status, i) && !HasBit(override_pcp, i) &&
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if (ppp_allowed[i].Any() && pcp_status.Test(i) && !override_pcp.Test(i) &&
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(!IsRailStationTile(ti->tile) || CanStationTileHavePylons(ti->tile))) {
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for (Direction k = DIR_BEGIN; k < DIR_END; k++) {
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uint8_t temp = PPPorder[i][GetTLG(ti->tile)][k];
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if (HasBit(ppp_allowed[i], temp)) {
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uint x = ti->x + x_pcp_offsets[i] + x_ppp_offsets[temp];
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uint y = ti->y + y_pcp_offsets[i] + y_ppp_offsets[temp];
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const auto &ppp_orders = PPPorder[i][GetTLG(ti->tile)];
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for (Direction k = DIR_BEGIN; k < DIR_END; k++) {
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Direction temp = ppp_orders[k];
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if (ppp_allowed[i].Test(temp)) {
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uint x = ti->x + x_pcp_offsets[i] + x_ppp_offsets[temp];
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uint y = ti->y + y_pcp_offsets[i] + y_ppp_offsets[temp];
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/* Don't build the pylon if it would be outside the tile */
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if (!HasBit(OwnedPPPonPCP[i], temp)) {
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if (!OwnedPPPonPCP[i].Test(temp)) {
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/* We have a neighbour that will draw it, bail out */
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if (trackconfig[TS_NEIGHBOUR] != TRACK_BIT_NONE) break;
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continue; // No neighbour, go looking for a better position
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@ -474,8 +476,8 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
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/* Drawing of pylons is finished, now draw the wires */
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for (Track t : SetTrackBitIterator(wireconfig[TS_HOME])) {
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SpriteID wire_base = (t == halftile_track) ? wire_halftile : wire_normal;
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uint8_t pcp_config = HasBit(pcp_status, PCPpositions[t][0]) +
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(HasBit(pcp_status, PCPpositions[t][1]) << 1);
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uint8_t pcp_config = pcp_status.Test(PCPpositions[t][0]) +
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(pcp_status.Test(PCPpositions[t][1]) << 1);
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const SortableSpriteStruct *sss;
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int tileh_selector = !(tileh[TS_HOME] % 3) * tileh[TS_HOME] / 3; // tileh for the slopes, 0 otherwise
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@ -40,11 +40,11 @@ enum TileSource : uint8_t {
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static const uint NUM_TRACKS_AT_PCP = 6;
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/** Which PPPs are possible at all on a given PCP */
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static const uint8_t AllowedPPPonPCP[DIAGDIR_END] = {
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1 << DIR_N | 1 << DIR_E | 1 << DIR_SE | 1 << DIR_S | 1 << DIR_W | 1 << DIR_NW,
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1 << DIR_N | 1 << DIR_NE | 1 << DIR_E | 1 << DIR_S | 1 << DIR_SW | 1 << DIR_W,
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1 << DIR_N | 1 << DIR_E | 1 << DIR_SE | 1 << DIR_S | 1 << DIR_W | 1 << DIR_NW,
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1 << DIR_N | 1 << DIR_NE | 1 << DIR_E | 1 << DIR_S | 1 << DIR_SW | 1 << DIR_W,
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static const Directions AllowedPPPonPCP[DIAGDIR_END] = {
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{DIR_N, DIR_E, DIR_SE, DIR_S, DIR_W, DIR_NW},
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{DIR_N, DIR_NE, DIR_E, DIR_S, DIR_SW, DIR_W},
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{DIR_N, DIR_E, DIR_SE, DIR_S, DIR_W, DIR_NW},
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{DIR_N, DIR_NE, DIR_E, DIR_S, DIR_SW, DIR_W},
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};
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/**
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@ -52,11 +52,11 @@ static const uint8_t AllowedPPPonPCP[DIAGDIR_END] = {
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* the following system is used: if you rotate the PCP so that it is in the
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* north, the eastern PPP belongs to the tile.
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*/
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static const uint8_t OwnedPPPonPCP[DIAGDIR_END] = {
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1 << DIR_SE | 1 << DIR_S | 1 << DIR_SW | 1 << DIR_W,
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1 << DIR_N | 1 << DIR_SW | 1 << DIR_W | 1 << DIR_NW,
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1 << DIR_N | 1 << DIR_NE | 1 << DIR_E | 1 << DIR_NW,
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1 << DIR_NE | 1 << DIR_E | 1 << DIR_SE | 1 << DIR_S
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static const Directions OwnedPPPonPCP[DIAGDIR_END] = {
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{DIR_SE, DIR_S, DIR_SW, DIR_W},
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{DIR_N, DIR_SW, DIR_W, DIR_NW},
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{DIR_N, DIR_NE, DIR_E, DIR_NW},
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{DIR_NE, DIR_E, DIR_SE, DIR_S},
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};
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/** Maps a track bit onto two PCP positions */
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@ -69,138 +69,137 @@ static const DiagDirection PCPpositions[TRACK_END][2] = {
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{DIAGDIR_NE, DIAGDIR_SE}, // RIGHT
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};
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#define PCP_NOT_ON_TRACK 0xFF
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/**
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* Preferred points of each trackbit. Those are the ones perpendicular to the
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* track, plus the point in extension of the track (to mark end-of-track). PCPs
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* which are not on either end of the track are fully preferred.
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* @see PCPpositions
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*/
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static const uint8_t PreferredPPPofTrackAtPCP[TRACK_END][DIAGDIR_END] = {
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{ // X
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1 << DIR_NE | 1 << DIR_SE | 1 << DIR_NW, // NE
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PCP_NOT_ON_TRACK, // SE
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1 << DIR_SE | 1 << DIR_SW | 1 << DIR_NW, // SW
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PCP_NOT_ON_TRACK // NE
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}, { // Y
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PCP_NOT_ON_TRACK,
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1 << DIR_NE | 1 << DIR_SE | 1 << DIR_SW,
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PCP_NOT_ON_TRACK,
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1 << DIR_SW | 1 << DIR_NW | 1 << DIR_NE
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}, { // UPPER
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1 << DIR_E | 1 << DIR_N | 1 << DIR_S,
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PCP_NOT_ON_TRACK,
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PCP_NOT_ON_TRACK,
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1 << DIR_W | 1 << DIR_N | 1 << DIR_S
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}, { // LOWER
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PCP_NOT_ON_TRACK,
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1 << DIR_E | 1 << DIR_N | 1 << DIR_S,
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1 << DIR_W | 1 << DIR_N | 1 << DIR_S,
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PCP_NOT_ON_TRACK
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}, { // LEFT
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PCP_NOT_ON_TRACK,
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PCP_NOT_ON_TRACK,
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1 << DIR_S | 1 << DIR_E | 1 << DIR_W,
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1 << DIR_N | 1 << DIR_E | 1 << DIR_W
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}, { // RIGHT
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1 << DIR_N | 1 << DIR_E | 1 << DIR_W,
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1 << DIR_S | 1 << DIR_E | 1 << DIR_W,
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PCP_NOT_ON_TRACK,
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PCP_NOT_ON_TRACK
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}
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static const Directions PreferredPPPofTrackAtPCP[TRACK_END][DIAGDIR_END] = {
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{ // X
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{DIR_NE, DIR_SE, DIR_NW}, // NE
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DIRECTIONS_ALL, // SE
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{DIR_SE, DIR_SW, DIR_NW}, // SW
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DIRECTIONS_ALL // NE
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},
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{ // Y
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DIRECTIONS_ALL,
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{DIR_NE, DIR_SE, DIR_SW},
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DIRECTIONS_ALL,
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{DIR_SW, DIR_NW, DIR_NE},
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},
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{ // UPPER
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{DIR_E, DIR_N, DIR_S},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_W, DIR_N, DIR_S},
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},
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{ // LOWER
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DIRECTIONS_ALL,
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{DIR_E, DIR_N, DIR_S},
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{DIR_W, DIR_N, DIR_S},
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DIRECTIONS_ALL,
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},
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{ // LEFT
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_S, DIR_E, DIR_W},
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{DIR_N, DIR_E, DIR_W},
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},
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{ // RIGHT
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{DIR_N, DIR_E, DIR_W},
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{DIR_S, DIR_E, DIR_W},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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},
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};
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#undef PCP_NOT_ON_TRACK
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#define NUM_IGNORE_GROUPS 3
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#define IGNORE_NONE 0xFF
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/**
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* In case we have a straight line, we place pylon only every two tiles,
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* so there are certain tiles which we ignore. A straight line is found if
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* we have exactly two PPPs.
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*/
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static const uint8_t IgnoredPCP[NUM_IGNORE_GROUPS][TLG_END][DIAGDIR_END] = {
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static const Directions IgnoredPCP[NUM_IGNORE_GROUPS][TLG_END][DIAGDIR_END] = {
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{ // Ignore group 1, X and Y tracks
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{ // X even, Y even
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IGNORE_NONE,
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1 << DIR_NE | 1 << DIR_SW,
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1 << DIR_NW | 1 << DIR_SE,
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IGNORE_NONE
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DIRECTIONS_ALL,
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{DIR_NE, DIR_SW},
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{DIR_NW, DIR_SE},
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DIRECTIONS_ALL,
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}, { // X even, Y odd
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IGNORE_NONE,
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IGNORE_NONE,
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1 << DIR_NW | 1 << DIR_SE,
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1 << DIR_NE | 1 << DIR_SW
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_NW, DIR_SE},
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{DIR_NE, DIR_SW},
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}, { // X odd, Y even
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1 << DIR_NW | 1 << DIR_SE,
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1 << DIR_NE | 1 << DIR_SW,
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IGNORE_NONE,
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IGNORE_NONE
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{DIR_NW, DIR_SE},
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{DIR_NE, DIR_SW},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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}, { // X odd, Y odd
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1 << DIR_NW | 1 << DIR_SE,
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IGNORE_NONE,
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IGNORE_NONE,
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1 << DIR_NE | 1 << DIR_SW
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{DIR_NW, DIR_SE},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_NE, DIR_SW},
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}
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},
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{ // Ignore group 2, LEFT and RIGHT tracks
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{
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1 << DIR_E | 1 << DIR_W,
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IGNORE_NONE,
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IGNORE_NONE,
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1 << DIR_E | 1 << DIR_W
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{DIR_E, DIR_W},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_E, DIR_W},
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}, {
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IGNORE_NONE,
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1 << DIR_E | 1 << DIR_W,
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1 << DIR_E | 1 << DIR_W,
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IGNORE_NONE
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DIRECTIONS_ALL,
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{DIR_E, DIR_W},
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{DIR_E, DIR_W},
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DIRECTIONS_ALL,
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}, {
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IGNORE_NONE,
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1 << DIR_E | 1 << DIR_W,
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1 << DIR_E | 1 << DIR_W,
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IGNORE_NONE
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DIRECTIONS_ALL,
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{DIR_E, DIR_W},
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{DIR_E, DIR_W},
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DIRECTIONS_ALL,
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}, {
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1 << DIR_E | 1 << DIR_W,
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IGNORE_NONE,
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IGNORE_NONE,
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1 << DIR_E | 1 << DIR_W
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{DIR_E, DIR_W},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_E, DIR_W},
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}
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},
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{ // Ignore group 3, UPPER and LOWER tracks
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{
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1 << DIR_N | 1 << DIR_S,
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1 << DIR_N | 1 << DIR_S,
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IGNORE_NONE,
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IGNORE_NONE
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{DIR_N, DIR_S},
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{DIR_N, DIR_S},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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}, {
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IGNORE_NONE,
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IGNORE_NONE,
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1 << DIR_N | 1 << DIR_S,
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1 << DIR_N | 1 << DIR_S
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_N, DIR_S},
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{DIR_N, DIR_S},
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}, {
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IGNORE_NONE,
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IGNORE_NONE,
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1 << DIR_N | 1 << DIR_S ,
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1 << DIR_N | 1 << DIR_S
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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{DIR_N, DIR_S},
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{DIR_N, DIR_S},
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}, {
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1 << DIR_N | 1 << DIR_S,
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1 << DIR_N | 1 << DIR_S,
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IGNORE_NONE,
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IGNORE_NONE
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{DIR_N, DIR_S},
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{DIR_N, DIR_S},
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DIRECTIONS_ALL,
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DIRECTIONS_ALL,
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}
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}
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};
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#undef NO_IGNORE
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/** Which pylons can definitely NOT be built */
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static const uint8_t DisallowedPPPofTrackAtPCP[TRACK_END][DIAGDIR_END] = {
|
||||
{1 << DIR_SW | 1 << DIR_NE, 0, 1 << DIR_SW | 1 << DIR_NE, 0 }, // X
|
||||
{0, 1 << DIR_NW | 1 << DIR_SE, 0, 1 << DIR_NW | 1 << DIR_SE}, // Y
|
||||
{1 << DIR_W | 1 << DIR_E, 0, 0, 1 << DIR_W | 1 << DIR_E }, // UPPER
|
||||
{0, 1 << DIR_W | 1 << DIR_E, 1 << DIR_W | 1 << DIR_E, 0 }, // LOWER
|
||||
{0, 0, 1 << DIR_S | 1 << DIR_N, 1 << DIR_N | 1 << DIR_S }, // LEFT
|
||||
{1 << DIR_S | 1 << DIR_N, 1 << DIR_S | 1 << DIR_N, 0, 0, }, // RIGHT
|
||||
static const Directions DisallowedPPPofTrackAtPCP[TRACK_END][DIAGDIR_END] = {
|
||||
{{DIR_SW, DIR_NE}, {}, {DIR_SW, DIR_NE}, {} }, // X
|
||||
{{}, {DIR_NW, DIR_SE}, {}, {DIR_NW, DIR_SE}}, // Y
|
||||
{{DIR_W, DIR_E}, {}, {}, {DIR_W, DIR_E} }, // UPPER
|
||||
{{}, {DIR_W, DIR_E}, {DIR_W, DIR_E}, {} }, // LOWER
|
||||
{{}, {}, {DIR_S, DIR_N}, {DIR_N, DIR_S} }, // LEFT
|
||||
{{DIR_S, DIR_N}, {DIR_S, DIR_N}, {}, {}, }, // RIGHT
|
||||
};
|
||||
|
||||
/* This array stores which track bits can meet at a tile edge */
|
||||
|
|
|
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Loading…
Reference in New Issue